Part Number Hot Search : 
N60UF T201104 N60UF HRW0702A 2SB1028 0310211 330J03 BLU0201
Product Description
Full Text Search
 

To Download MT91600ANR1 Datasheet File

  If you can't view the Datasheet, Please click here to try to view without PDF Reader .  
 
 


  Datasheet File OCR Text:
 MT91600 Programmable SLIC
Data Sheet Features
* * * * * * * * * Transformerless 2 W to 4 W conversion Controls battery feed to line Programmable line impedance Programmable network balance impedance Off-hook and dial pulse detection Ring ground over-current protection Programmable gain Programmable constant current feed -22 V to -72 V battery operation Ordering Information
MT91600AN MT91600ANR MT91600AN1 MT91600ANR1 *Pb 28 Pin SSOP 28 Pin SSOP 28 Pin SSOP* 28 Pin SSOP* Free Matte Tin Tubes Tape & Reel Tubes Tape & Reel
February 2005
-40C to +85C
Description
The Zarlink MT91600 provides an interface between a switching system and a subscriber loop, mainly for short loop SLIC applications. The functions provided by the MT91600 include battery feed, programmable constant current, 2 W to 4 W conversion, off-hook and dial pulse detection, user definable line and network balance impedance's and the capability of programming the audio gain externally. The device is fabricated as a CMOS circuit in a 28 pin SSOP package.
Applications
Line interface for: * * * * PABX/ONS Intercoms Key Telephone Systems Control Systems
X3
X2
X1
TD
Tip Drive Controller
Audio Gain & Network Balance Circuit
VX VR
TF TIP RING RF C3A C3B RV RD Over-Current Protection Circuit Relay Driver Ring Drive Controller Loop Supervision Line Sense 2 W to 4 W Conversion & Line Impedance
Z3 Z2 Z1 RLYC RLYD
IC
VREF
SHK
C1
C2A
C2B
VDD GND VEE
Figure 1 - Functional Block Diagram 1
Zarlink Semiconductor Inc. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright 1999-2005 Zarlink Semiconductor Inc. All Rights Reserved.
MT91600
Change Summary
Page 10 Item Figure 5 Change Updated Application Diagram
Data Sheet
VDD TD TF TIP RING VREF IC RF RV RD C3A C3B C2B C2A
1 2 3 4 5 6 7 8 9 10 11 12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15
VEE GND RLYD RLYC SHK C1 X2 VR X3 VX X1 Z3 Z2 Z1
Figure 2 - Pin Connections Pin Description Pin # 1 2 3 4 5 6 Name VDD TD TF TIP RING VREF Positive supply rail, +5 V. Tip Drive (Output). Controls the Tip transistor. Tip Feed. Connects to the Tip transistor and to the TIP lead via the Tip feed resistor. Tip. Connects to the TIP lead of the telephone line. Ring. Connects to the RING lead of the telephone line. Reference Voltage (Input). This pin is used to set the subscribers loop constant current. Changing the input voltage sets the current to any desired value within the working limits. VREF is related to VLC. Internal Connection (Input). This pin must be connected to GND for normal operation. Ring Feed. Connects to the RING lead via the Ring feed resistor. Ring Voltage and Audio Feed. Connects directly to the Ring drive transistor and also to Ring Feed via a relay. Ring Drive (Output). Controls the Ring transistor. A filter capacitor for over-current protection is connected between this pin and GND. A filter capacitor for over-current protection is connected between this pin and GND. A capacitor for loop current stability is connected between this pin and C2A. A capacitor for loop current stability is connected between this pin and C2B. Line Impedance Node 1. A resistor of scaled value "k" is connected between Z1 and Z2. This connection can not be left open circuit. Description
7 8 9 10 11 12 13 14 15
IC RF RV RD C3A C3B C2B C2A Z1
2
Zarlink Semiconductor Inc.
MT91600
Pin Description (continued) Pin # 16 17 18 19 20 21 22 23 24 25 26 27 28 Name Z2 Z3 X1 VX X3 VR X2 C1 SHK RLYC RLYD GND VEE Description
Data Sheet
Line Impedance Node 2. This is the common connection node between Z1 and Z3. Line Impedance Node 3. A network either resistive or complex of scaled value "k" is connected between Z3 and Z2. This connection can not be left open circuit. Gain Node 1. This is the common node between Z3 and VX where resistors are connected to set the 2 W to 4 W gain. Transmit Audio (Output). This is the 4 W analog signal to the SLIC. Gain Node 3. This is the common node between VR and the audio input from the CODEC or switching network where resistors are fitted to sets the 4 W to 2 W gain Receive Audio (Input). This is the 4 W analog signal to the SLIC. Gain Node 2. Networks, either resistive or complex, are connected between this node, VR and GND to set the Network Balance Impedance for the SLIC. A filter capacitor for ring trip is connected between this pin and GND. Switch Hook (Output). This pin indicates the line state of the subscribers telephone. The output can also be used for dial pulse monitoring. SHK is high in off-hook state. Relay Control (Input). An active high on this pin will switch RLYD low. Inverted Output of RLYC. It is used to drive the bipolar transistor that drives the relay (see Figure 5.) Ground. Return path for +5 V and -5 V. This should also be connected back to the return path for the loop battery, LGND and relay drive ground RLYGND. Negative supply rail, -5 V.
Functional Description
The MT91600 is the analog SLIC for use in a 4 Wire switched system. The SLIC performs all of the normal interface functions between the CODEC or switching system and the analog telephone line such as 2 W to 4 W conversion, constant current feed, ringing and ring trip detection, current limiting, switch hook indication and line and network balance impedance setting using minimal external components. Refer to Figure 5 for MT91600 components designation.
2 Wire to 4 Wire Conversion
The hybrid performs 2 wire to 4 wire conversion by taking the 4 wire signal from an analog switch or voice CODEC, a.c. coupled to VRIN, and converting it to a 2 wire differential signal at tip and ring. The 2 wire signal applied to tip and ring by the telephone is converted to a 4 wire signal and should be a.c. coupled to Vx which is the output from the SLIC to the analog switch or voice CODEC input.
Gain Control
It is possible to set the Transmit and Receive gains by the selection of the appropriate external components. The gains can be calculated by the formulae: 2W to 4W gain: Gain 2 - 4 = 20*Log [ R13 / R12] 4W to 2W gain: Gain 4 - 2 = 20*Log [0.891 * (R14 / R15)]
3
Zarlink Semiconductor Inc.
MT91600
Impedance Programming
Data Sheet
The MT91600 allows the designer to set the device's impedance across TIP and RING, (ZTR), and network balance impedance, (ZNB), separately with external low cost components. For a resistive load, the impedance (ZTR) is set by R11 and R18. For a complex load, the impedance (ZTR) is set by R11, R18, R19 & C8 (see Figure 5.) The network balance, (ZNB), is set by R16, R17 & C3 (see Figure 5.) The network balance impedance should be calculated once the 2W - 4W gain has been set.
Line Impedance
For optimum performance, the characteristic impedance of the line, (Zo), and the device's impedance across TIP and RING, (ZTR), should match. Therefore: Zo = ZTR The relationship between Zo and the components that set ZTR is given by the formula: Zo / ( R1+R2) = kZo / R11 where kZo = ZLZ ZLZ = R18, for a resistive load. ZLZ = [R18 + (R19 // C8)], for a complex load. The value of k can be set by the designer to be any value between 20 and 250. Three rules to ensure the correct operation of the circuit: (A) R18 + R19 > 50k (B) R1 = R2. (C) R11 > =50k It is advisable to place these components as close as possible to the SLIC.
Network Balance Impedance
The network balance impedance, (ZNB), will set the transhybrid loss performance for the circuit. The balance of the circuit is independent of the 4 - 2 Wire gain but is a function of the 2 - 4 Wire gain. The method of setting the values for R16 and R17 is given by the formula: R17 = [1.782 * Zo / ( Zo+ZNB) * ( R13 / R12 )] R17 + R16 [1 + R13 / R12] where ZNB is the network balance impedance of the SLIC and Zo is the line impedance. (R16 + R17) >= 50k It is advisable to place these components as close as possible to the SLIC.
4
Zarlink Semiconductor Inc.
MT91600
Loop Supervision & Dial Pulse Detection
Data Sheet
The Loop Supervision circuit monitors the state of the phone line and when the phone goes "Off Hook" the SHK pin goes high to indicate this state. This pin reverts to a low state when the phone goes back "On Hook" or if the loop resistance is too high for the circuit to continue to support a constant current. The SHK output can also be monitored for dialing information when used in a dial pulse system.
Constant Current Control
The SLIC employs a feedback circuit to supply a constant feed current to the line. This is done by sensing the sum of the voltages across the feed resistors, R1 and R2, and comparing it to the input reference voltage, Vref, that determines the constant current feed current. The MT91600's programmable current range is between 18 mA to 32 mA.
Line Drivers & Overcurrent Protection
The Line Drivers control the external Battery Feed circuit which provide power to the line and allows bi-directional audio transmission. The loop supervision circuitry provides bias to the line drivers to feed a constant current while the over-current protection circuitry prevents the ring driver from causing the ring transistor to overload. The line impedance presented by the Line Driver circuitry is determined by the external network, which may be purely resistive or complex, allowing the circuit to be configured for use in any application. The impedance can also be fixed to one value and modified to look like a different value by reflecting an impedance through the SLIC from an intelligent CODEC or DSP module. There is long term protection on the RING output against accidental short circuits that may be applied either across TIP/RING to GND or RING to GND. This high current will be sensed and limited to a value that will protect the circuit. In situations where an accidental short circuit occurs either across TIP/RING to GND or RING to GND, an excessive amount of current will flow through the ring drive transistor, Q3. Although the MT91600 will sense this high current and limit it, if the power rating of Q3 is not high enough, it may suffer permanent damage. In this case, a power sharing resistor, R23, can be inserted (see Figure 5) to dissipate some of the power. Capacitor C13 is inserted to provide an a.c. ground point. The criteria for selecting a value for the power sharing resistor R23 can be found in the application section of this data sheet.
Ringing and Ring Trip Detection
Ringing is applied to the line by disconnecting pin 8, RF, from pin 9, RV, and connecting it to a ringing source which is battery backed. This may be done by use of an electro-mechanical relay. The SLIC is capable of detecting an Off Hook condition during ringing by filtering out the large A.C. component by use of the external components connected to pin 23. This filter allows an Off Hook condition to be monitored at SHK, pin 24. When using DTMF signalling only i.e., pulse dialling is not used, the capacitor, C7, can be permanently connected to ground and does not require to be switched out during dialling.
Power up Sequence
The circuit should be powered up in the following order: AGND, VEE, VDD, VBAT.
5
Zarlink Semiconductor Inc.
MT91600
Application
Data Sheet
The following Application section is intended to demonstrate to the user the methods used in calculating and selecting the external programming components in implementing the MT91600 as an analog line interface in a communication system. The programming component values calculated below results in the optimum performance of the device. Refer to Figure 5 for MT91600 components designation.
Component Selection
Feed Resistors (R1, R2) The selection of feed resistors, R1 and R2, can significantly affect the performance of the MT91600. It is recommended that their values fall in the range of: 200 <= R1 <= 250 where, R1 = R2 The resistors should have a tolerance of 1% (0.15% matched) and a power rating of 1 Watt. Loop Current Setting (R3, R4, C9) By using a resistive divider network, (Figure 3), it is possible to maintain the required voltage at Vref to set ILOOP. The loop current programming is based on the following relationship: ILOOP = - [ F * V LC + G * V BAT] * K o * H (R1 +R2) where, F = R4 / (R4 + R3) G = R3 / (R4 +R3) K o = 200000 / (200000 + (R4//R3) ) H = 1.07 ILOOP is in Ampere
From Figure 3 with R1 = R2 = 220 For ILOOP = 25mA, V LC = 0V, Vbat=-48V
R3 43k VLC C9 100nF
6 R4 130k
VREF
MT91600
VBAT
Figure 3 - Resistor Divider
6
Zarlink Semiconductor Inc.
MT91600
C9 is inserted to ensure pin 6, Vref, remains at a.c. ground. 100 nF is recommended.
Data Sheet
ILOOP can also be set by directly driving Vref with a low impedance voltage source. (See Figure 4). It is recommended that a small resistor be placed in series with the Vref pin. In this case: ILOOP = 1.07 * Vs (R1 +R2) where, Vs < 0
2k Vs
6
VREF
C9 100nF
MT91600
Figure 4 - Direct Voltage Calculating Component Values For AC Transmission There are five parameters a designer should know before starting the component calculations. These five parameters are: 1) 2) 3) 4) 5) characteristic impedance of the line Zo network balance impedance ZNB value of the feed resistors (R1 and R2) 2 W to 4 W transmit gain 4 W to 2 W receive gain
The following example will outline a step by step procedure for calculating component values. Given: Zo = 600, ZNB= 600, R1=R2= 220 Gain 2 - 4 = -1dB, Gain 4 - 2 = -1dB Step 1: Gain Setting (R12, R13, R14, R15) Gain 2 - 4 = 20 Log [ R13 / R12] -1 dB = 20 Log [R13 / R12] R12 = 112.2k, R13 = 100k. Gain 4 - 2 = 20 Log [0.891 * [R14 / R15)] -1 dB = 20 Log [0.891 * [R14 / R15)] R14 = 100k, R15 = 100k.
7
Zarlink Semiconductor Inc.
MT91600
Step 2: Impedance Matching (R11, R18, R19, C8) a) Zo / ( R1+R2) = kZo / R11 600/(220+220) = (k*600)/R11 let k = 125 R11 = 55k. b) In general, kZo = ZLZ where: ZLZ = R18, for a resistive load. ZLZ = [R18 + (R19 // C8)], for a complex load. Since we are dealing with a resistive load in this example ZLZ = R18, and therefore: kZo = R18 (125 * 600)= R18 R18 = 75k. Step 3: Network Balance Impedance (R16, R17) R17 = [1.782 * Zo / ( Zo+ZNB) * ( R13 / R12 )] R17 + R16 [1 + R13 / R12)] R17 = 0.4199 R17 + R16 set R17 = 100k, R16 becomes 138k. R16 = 138k, R17 = 100k. Complex Line Impedance, Zo
Data Sheet
In situations where the characteristic impedance of the line Zo is a complex value, determining the component values for impedance matching (R11, R18, R19, C8) is as follows: Given Zo = 220 + (820 // 120nF) Zo / ( R1+R2) = kZo / R11 where, kZo = [R18 + (R19 // C8)] Choose a standard value for C8 to find a suitable value for k. Since 1nF exists, let C8 = 1nF then, k = 120nF / C8 k = 120nF / 1nF k =120 R18 = k * 220 R18 = 120 * 220 R18 = 26400 R19 = k * 820 R19 = 120 * 820 R19 = 98400 R18 = 26k4, R19 = 98k4 (Equation 1)
8
Zarlink Semiconductor Inc.
MT91600
From (Equation 1) R11 = k * (R1 + R2) R11 = 120 * (220 + 220) R11 = 52k8 Power Sharing Resistor (R23) To determine the value of R23, use the following equations: R23(max)= |Vbat(min)| - 100 - (2*R2 + Lr + DCRP) 30mA R23(min)= |Vbat(max)| - Pd(max) - R2 40mA 1.6mA where, Vbat(min/max) = the expected variation of Vbat. R2 = the feed resistor. Lr = maximum DC loop resistance. DCRP = DC resistance of the phone set. Pd(max) = the maximum power dissipation of the ring drive transistor Q3. If R23(max) > R23(min), then set R23 to be the geometric center: R23 = Square Root (R23(max) * R23(min)) If R23(max) < R23(min), then a violation has occurred. Pd(max) will have to be increased. If R23 = negative value, power sharing is not required, i.e., R23=0 A numerical example: Given: R2 = 220 Lr = 325 (2.5km of 28 gauge wire, averaged at 65/km) DCRP = 200 Pd(max) = 1.5W Vbat = -48V +/- 10% (i.e. -43V to -53V) Therefore: R23(max) = (43/30mA) - 100 - (2 * 220 + 325 + 200) = 1433.3 - 100 - 965 R23(max) = 368.3 R23(min) = (53/40mA) - (1.5/1.6mA) - 220 = 1325 - 937.5 - 220 R23(min) = 167.5 R23 = Square Root ( 368.3 * 167.5 ) R23 = 248.4
Data Sheet
9
Zarlink Semiconductor Inc.
MT91600
VEE VDD 1 SHK RLYC Q4 C4 D1 VLC R3 R4 VBAT VBAT D2a D4 D2b R22 3 R1 TIP R21 PR1 R20 RING R2 8 D3b 9 R5 VDD 90 Vrms R7
RD C3A C3B C2B RV Z1 RF Z2 Z3 TF X3 VX VREF
Data Sheet
C7
C6
K1b 28
SHK RLYC
27
GND
7
IC
23
C1 X2
VDD VEE
C3 22 R16 R14 R17
24 25 26
VR 21
VRLY K1
RLYD
C11
20 19
R15 VX
VRIN
6 C9
Q1
C12 2
TD X1
18
MT91600 R12 17
4
TIP
ZLZ
5
RING
16
VBAT K1a D3a
15
C2A
~
R6 R9 C5
10 Q2 C1
11
12 C10
13
14 R10 C2 Impedance ZLZ Resistive Load Zo Complex Load Zo R18 R19
VBAT=-48 V Q3
R8
R23
C13
R18
R11
R13
C8
VBAT
Figure 5 - Typical Application
10
Zarlink Semiconductor Inc.
MT91600
component designation and recommended configuration
Data Sheet
Component List* for a Typical Application with a Resistive 600 Line Impendance - Refer to Figure 5 for Resistor Values R1 R3 R5 R7 R9 R11 R13 R15 R17 R19 R21 R23 220 1% (0.15% matched), 1 W 43 k 220 3 k 1 k 55 k 100 k 100 k 100 k 0 2 k 248 Capacitor Values C1 C3 C5 C7 C9 C11 C13 100 nF, 5% 100 pF, 5% 3.3 nF, 5% 100 nF, 20% 100 nF, 20% 47 pF, 20% 100 nF 20% Diodes and Transistors D1 D3a/b Q2 Q4 BAS16 or equivalent BAV99 dual diode or equivalent 2N2907 or MPSA92 or MMBTA92 2N2907 or MPSA92 or MMBTA92 D2a/b Q1 Q3 D4 BAV99 dual diode or equivalent 2N2222 or MPSA42 or MMBTA42 2N2222 or MPSA42 or MMBTA42 1N5242 12 V Zener or equivalent C2 C4 C6 C8 C10 C12 300 nF, 5% 33 nF, 20% 1 uF, 20%, 16 V 0F 100 nF, 5% 33 nF, 10% R2 R4 R6 R8 R10 R12 R14 R16 R18 R20 R22 220 1% (0.15% matched), 1 W 130 k 75 k 1 k 560 k 112 k 100 k 138 k 75 k 2 k 1 k
Note: All resistors are 1/4 W, 1% unless otherwise indicated. *Assumes Zo = Z NB = 600 , Gain 2 - 4 = -1 dB, Gain 4 - 2 = -1 dB. Decoupling capacitors, (1 uF, 100 V, 20%), can be added to VDD, V EE, V BAT and V RLY to provide improved PSRR performance.
K1
=
Electro-mechanical relay, 5V, DPDT/2 FORM C
PR1 = This device must always be fitted to ensure damage does not occur from inductive loads.For simple applications, PR1 can be replaced by a single TVS, such as 1.5KE220C, across tip and ring. For applications requiring lightning and mains cross protection further circuitry will be required and the following protection devices are suggested: P2353AA, P2353AB (Teccor), THBT20011, THBT20012, THBT200S (SGS-Thomson), TISP2290, TSSP8290L (T.I.)
11
Zarlink Semiconductor Inc.
MT91600
Absolute Maximum Ratings* Parameter 1 DC Supply Voltages Sym. VDD VEE VBAT Vring VREF -20 Min. -0.3 -6.5 -80 Max. +6.5 +0.3 +0.3 100 +0.3 200 Iring Tstg Pdiss -65 30 45 +150 0.10 500 Units V V V Vrms V V mA. RMS mA C W V
Data Sheet
Comments
Limited by the Drive transistor, Q3. Superimposed on VBAT Note 1 MAX 1 ms (with power on)
2 3 4 5 6 7 8 9
Ringing Voltages Voltage setting for Loop Current Overvoltage Tip/GND Ring/GND, Tip/Ring Ringing Current Ring Ground over-current Storage Temp Package Power Dissipation ESD Rating
Note 2 +85C max, VBAT = -48 V Human Body Model Note 3
*Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied.
Note 1: Voltage at Vref pin set by VLC and potential divider. Note 2: Tip and Ring must not be shorted together and to ground at the same time. Note 3: The device contains circuitry to protect the inputs from static voltage up to 500 V. However, precautions should be taken to avoid static charge build up when handling the device.
Recommended Operating Conditions Parameter 1 Operating Supply Voltages Ringing Voltage Voltage setting for Loop Current Sym. VDD VEE VBAT Vring VREF Min. 4.75 -5.25 -72 0 Typ. 5.00 -5.00 -48 50 -10.3 Max. 5.25 -4.75 -22 Units V V V VRMS V Note 4 ILOOP = 25 mA, R1=R2=220 VBAT = -48 V Test Conditions
2 3
4
Operating Temperature
To
-40
+25
+85
C
Typical figures are at 25C with nominal supply voltages and are for design aid only Electrical Characteristics are over Recommended Operating Conditions unless otherwise stated. Typical figures are at 25C with nominal + 5 V supplies and are for design aid only. Note 4: 16 to 68 Hz superimposed on a V BAT.
12
Zarlink Semiconductor Inc.
MT91600
DC Electrical Characteristics Characteristics 1 Supply Current Sym. IDD IEE IBAT PC ILOOP 22 Min. Typ. Max. 11 8.5 45 90 28 Units mA mA mA mW mA Standby/Active VREF = -10.3 V Test circuit as Fig. 6 VBAT = -48 V
Data Sheet
Test Conditions
25 60 25
2 3
Power Consumption Constant Current Line Feed Programmable Loop Current Range Operating Loop (inclusive of Telephone Set) Off Hook Detection Threshold RLYC Input Low Voltage Input High Voltage SHK Output Low Voltage Output High Voltage Dial Pulse Distortion ON OFF
4 5
ILOOP RLOOP
18 1200 450
32
mA ILOOP = 18 mA VBAT = -48 V ILOOP = 18 mA VBAT = -22 V VREF = -10.3 V VBAT = -48 V See Note 5. ILOOP = 25 mA lil = 50 A lih = +50 A Lol = 8 mA Loh = -0.4 mA
6
SHK
20
mA
7
Vil Vih
Vol Voh
2.0
0.4
0.7
V V V V ms ms
8
2.7 +4 +4
0.4
8
Electrical Characteristics are over Recommended Operating Conditions unless otherwise stated. Typical figures are at 25C with nominal +5 V and are for design aid only. Note 5: Off hook detection is related to loop current.
13
Zarlink Semiconductor Inc.
MT91600
AC Electrical Characteristics Characteristics 1 2 3 4 5 Ring Trip Detect Time Output Impedance at VX Gain 4-2 @ 1 kHz Gain Relative to 1 kHz Transhybrid Loss THL 20 -1.3 Sym. Tt Min. Typ. 100 10 -1 0.15 25 -0.8 Max. 300 Units mS dB dB dB
Data Sheet
Test Conditions
Note 6 Test circuit as Fig. 8 300 Hz - 3400 Hz Note 6 300 Hz - 3400 Hz Test circuit as Fig. 8 Note 6 Test circuit as Fig. 7 300 Hz to 3400 Hz Note 6 300 Hz - 3400 Hz Test circuit as Fig. 10 3 dBm, 1 kHz @ 2 W 1 Vrms, 1 KHz @ 4 W Input 0.5 Vrms, 1 KHz Test circuit as Fig. 9 200 Hz to 3400 Hz Test circuit as Fig. 9 200 Hz to 1000 Hz 1000 Hz to 3400 Hz Cmessage Filter Cmessage Filter
6 7 8
Gain 2-4 @ 1 kHz Gain Relative to 1 kHz Return Loss at 2-Wire RL
-1.3
-1 0.15
-0.8
dB dB
20
30
dB
9
Total Harmonic Distortion @2W @VX
THD 0.3 0.3 CMR LCL 35 42 55 58 48
Nc
1.0 1.0
% % dB dB dB dB
10 11 12 13
Common Mode Rejection 2 wire to Vx Longitudinal to Metallic Balance Metallic to Longitudinal Balance Idle Channel Noise @2W @VX
12 12 PSRR
dBrnC dBrnC
14
Power Supply Rejection Ratio at 2 W and VX Vdd Vee
23 23
dB dB
0.1Vp-p @ 1kHz
Electrical Characteristics are over Recommended Operating Conditions unless otherwise stated. Typical figures are at 25C with nominal +5 V and are for design aid only. Note 6: Assumes Zo = ZNB = 600 and both transmit and receive gains are programmed externally to -1 dB, i.e. Gain 2-4 = -1 dB, Gain 42 = -1 dB.
14
Zarlink Semiconductor Inc.
MT91600
Test Circuits
Data Sheet
Figures 6, 7, 8, 9 and 10 are for illustrating the principles involved in making measurements and do not necessarily reflect the actual method used in production testing.
TIP Zo ILoop RING VBAT SLIC 6 R4 R3 C9 VLC
Figure 6 - Loop current programming
20 TIP Zo __ 2 VS 19
R15
VX R13
~
Zo __ 2
VTR
SLIC 18
RING Gain = 20*Log(VX/VTR)
17
Figure 7 - 2-4 Wire Gain
VX C3
19 TIP 22 21 Zo VTR SLIC R14 C11 R16
R12
R17
Gain = 20*Log(VTR/VS) THL = 20*Log(VX/VS)
RING
20
R15
VRIN
~V
S
Figure 8 - 4-2 Wire Gain & Transhybrid Loss
15
Zarlink Semiconductor Inc.
MT91600
Data Sheet
TIP Zo __ 2 VTR Zo __ 2 RING SLIC
20
R15
VS
~
19
VX
Long. Bal. = 20*Log(VTR/VS) CMR = 20*Log(VX/VS)
Figure 9 - Longitudinal Balance & CMR
20 Zo R VS TIP 17
R15
~
R
VZ
SLIC 16
R19
R18
C8
RING Gain = 20*Log(2*VZ/VS)
15
Figure 10 - Return Loss
16
Zarlink Semiconductor Inc.
R11
For more information about all Zarlink products visit our Web Site at
www.zarlink.com
Information relating to products and services furnished herein by Zarlink Semiconductor Inc. or its subsidiaries (collectively "Zarlink") is believed to be reliable. However, Zarlink assumes no liability for errors that may appear in this publication, or for liability otherwise arising from the application or use of any such information, product or service or for any infringement of patents or other intellectual property rights owned by third parties which may result from such application or use. Neither the supply of such information or purchase of product or service conveys any license, either express or implied, under patents or other intellectual property rights owned by Zarlink or licensed from third parties by Zarlink, whatsoever. Purchasers of products are also hereby notified that the use of product in certain ways or in combination with Zarlink, or non-Zarlink furnished goods or services may infringe patents or other intellectual property rights owned by Zarlink. This publication is issued to provide information only and (unless agreed by Zarlink in writing) may not be used, applied or reproduced for any purpose nor form part of any order or contract nor to be regarded as a representation relating to the products or services concerned. The products, their specifications, services and other information appearing in this publication are subject to change by Zarlink without notice. No warranty or guarantee express or implied is made regarding the capability, performance or suitability of any product or service. Information concerning possible methods of use is provided as a guide only and does not constitute any guarantee that such methods of use will be satisfactory in a specific piece of equipment. It is the user's responsibility to fully determine the performance and suitability of any equipment using such information and to ensure that any publication or data used is up to date and has not been superseded. Manufacturing does not necessarily include testing of all functions or parameters. These products are not suitable for use in any medical products whose failure to perform may result in significant injury or death to the user. All products and materials are sold and services provided subject to Zarlink's conditions of sale which are available on request.
Purchase of Zarlink's I2C components conveys a licence under the Philips I2C Patent rights to use these components in and I2C System, provided that the system conforms to the I2C Standard Specification as defined by Philips. Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc. Copyright Zarlink Semiconductor Inc. All Rights Reserved.
TECHNICAL DOCUMENTATION - NOT FOR RESALE


▲Up To Search▲   

 
Price & Availability of MT91600ANR1

All Rights Reserved © IC-ON-LINE 2003 - 2022  

[Add Bookmark] [Contact Us] [Link exchange] [Privacy policy]
Mirror Sites :  [www.datasheet.hk]   [www.maxim4u.com]  [www.ic-on-line.cn] [www.ic-on-line.com] [www.ic-on-line.net] [www.alldatasheet.com.cn] [www.gdcy.com]  [www.gdcy.net]


 . . . . .
  We use cookies to deliver the best possible web experience and assist with our advertising efforts. By continuing to use this site, you consent to the use of cookies. For more information on cookies, please take a look at our Privacy Policy. X